Sarita Adve Honored for Work on Memory Consistency Models

5/12/2009

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Sarita V Adve
Sarita V Adve

Computer science professor Sarita Adve has been honored with the Maurice Wilkes Award for her work on memory consistency models. The award is given annually by the ACM special interest group SIGARCH to honor outstanding contribution in field of computer architecture by a researcher in the first 20 years of their career.

The memory consistency model lies at the heart of the semantics of a threaded parallel program. It defines what values a memory read should return and affects the programmability and performance of a parallel system. It has been one of the most challenging areas in concurrent hardware and software specification, with a plethora of incompatible and ambiguous models defined by different software systems and hardware vendors. Adve's work over almost 20 years has provided the foundation for a recent convergence in this area - finally mainstream languages have embraced a largely common model and hardware vendors have announced specifications compatible with the language models. Adve's approach drove this convergence by addressing both programmability and performance together.

"Sarita's early work departed from the prevalent hardware-centric view of consistency to a combined hardware/software view," said Marc Snir, director of the Universal Parallel Computer Research Center and Faiman Muroga professor of computer science at the University of Illinois. "She observed that for common, well-synchronized programs - which she formalized as data-race-free - we can provide both programmability of sequential consistency and high performance."

This observation ultimately led to a comprehensive framework to specify models as "sequential consistency for data-race-free programs" and a formalization of the optimizations the models allowed. This work forms the foundation for the Java and C++ memory consistency models, which she recently co-developed.

Adve has tackled the consistency problem from all angles, from theoretical foundations through hardware optimizations and language requirements. In addition, she has taken a leadership role in several community-scale efforts to achieve language and hardware convergence.

"Sarita almost single-handedly convinced the [C++] community that data-race-free was not only efficient but any proposed departure would be too complex to formalize reasonably," said Snir. "Largely in response, AMD and Intel recently announced their memory model specifications, including changes to be compatible with C++ and Java."

Among her many other contributions, Adve research work has also investigated concepts of lifetime reliability aware architecture and dynamic reliability management, cross-layer energy management, methods for exploiting instruction-level parallelism for memory system performance, and multiprocessor simulation methods.

Adve is currently working to develop a comprehensive concurrent hardware/software interface to achieve the promise of ubiquitous parallelism as part of the Universal Parallel Computing Research Center at the University of Illinois, where she serves as the director of research.


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This story was published May 12, 2009.